The present invention relates to a method for fabricating a semiconductor device, and more particularly, to a method for fabricating a semiconductor device interconnection with an interface barrier.
Recently, a signal delay due to resistance-capacitance (RC) delay of an interconnection (such as a gate line, a bit line and a metal line) has increased demands for a new material and structure of an interconnection used in a high-speed semiconductor memory device.
In particular, to reduce the effect of the RC delay, a poly metal gate structure has been proposed, in which a gate has a multi-layered structure with a polysilicon layer and a tungsten layer, i.e., W/poly-Si structure stacked in sequence. The poly metal gate structure employing tungsten is called a tungsten poly gate structure.
In such a tungsten poly gate structure, the barrier layer is an interface barrier used to suppress an interface reaction between the tungsten layer and the polysilicon layer. A tungsten nitride (WN) layer or a multi-layered structure with a tungsten silicide (WSi) layer and a WN layer is used as the barrier layer of the tungsten poly gate structure.
FIG. 1 illustrates the measured Kelvin contact resistance (Kelvin Rc) between layers according to a kind of a barrier layer in a conventional tungsten poly gate structure. The reference symbol ‘A’ indicates the Kelvin contact resistance of a tungsten poly gate structure where a tungsten nitride layer is interposed between a polysilicon layer and a tungsten layer, and a reference symbol ‘B’ indicates the Kelvin contact resistance of a tungsten poly gate structure where a tungsten silicide layer and a tungsten nitride layer are interposed between a polysilicon layer and a tungsten layer.
Referring to FIG. 1, it can be observed that the interface resistance is high for case A where only the tungsten nitride layer is interposed between the polysilicon layer and the tungsten layer. This is because a silicon-nitrogen (Si—N) reaction is triggered between the tungsten nitride layer and the polysilicon layer. In contrast, Si—N reaction is somewhat suppressed in the case B where the tungsten silicide layer is used as the barrier layer.
From the measurement results shown in FIG. 1, it can be seen that a multi-layered barrier with the tungsten silicide layer and the tungsten nitride layer is suitable for memory devices with high-speed performance. However, it can be observed from a micrographic view (see FIG. 2) that the multi-layered barrier with the tungsten silicide layer and the tungsten nitride layer does not sufficiently suppress the Si—N reaction after performing a subsequent thermal process.
FIG. 2 illustrates a micrographic view of a tungsten poly gate structure having a multi-layered barrier with a tungsten silicide layer and a tungsten nitride layer after performing a subsequent thermal process.
Referring to FIG. 2, the subsequent thermal process triggers a reaction at an interface between the tungsten silicide layer and the tungsten nitride layer. For example, WSiN reaction and Si—N reaction occur at the interface. The WSiN reaction does not have an effect on interface resistance because it is a metallic reaction. However, the Si—N reaction increases interface resistance because it is a dielectric reaction.
The Si—N reaction occurs due to agglomeration of the tungsten silicide layer during the subsequent thermal process. This is because of a phase transformation in the tungsten silicide layer when silicon (Si) diffuses from the underlying polysilicon layer into the tungsten silicide layer during the subsequent thermal process, and resultantly the tungsten silicide layer agglomerates to release a film stress caused by the phase transformation. In this way, an interface, which directly contacts both the polysilicon layer and the tungsten nitride layer, exists in a vacant space between agglomerated tungsten silicide layers, thus triggering the Si—N dielectric reaction.
As seen from FIG. 2, even though the multi-layered barrier with the tungsten silicide layer and the tungsten nitride layer is used, the agglomeration of the tungsten silicide layer causes the Si—N reaction to occur between the tungsten nitride layer and the polysilicon layer, resulting in an increase in interface resistance. This leads to RC delay in a transistor so that it becomes difficult to satisfy the requirements for high-speed memory.
Such Si—N reaction caused by the agglomeration of tungsten silicide is not limited to a gate forming process, but also occurs during other line forming processes employing the multi-layered barrier with the tungsten silicide layer and the tungsten nitride layer, for example, a metal line forming process or a bit line forming process.